JIT Issues
- Abstract
- This document maintains the list of ECL issues that need to be
addressed.
1. JIT1 Compilation Passes
- CodeRegion SSA construction with value numbering and copy folding.
- CodeRegion SSA propagation of instruction scheduling and register allocation
attributes. These include the safe speculation control regions and the rematerializable
live ranges.
- CodeRegion SSA destruction with COPY coalescing and variable pinning.
- CodeRegion control-flow simplifications, code layout, code duplication.
- CodeRegion prepass superblock scheduling and software pipelining.
- CodeRegion register allocation and collection of the stack frame block
contributions.
- Procedure stack frame layout and expansion of Simulated Operator(s).
- CodeRegion postpass instruction scheduling.
2. LIR Unresolved Issues
- Scope of SSA destruction
-
Should the SSA destruction enforce target architecture constraints between source
and destination of Operation(s) like base register auto-modification and two-address
instruction set?
- Expansion of Generic Operator(s)
-
The Generic Operator(s) need to be expanded before prepass scheduling, as
scheduling requires Scheduling classes for non-pseudo Operator(s). The Simulated
Operator(s) have a Scheduling class so they are acceptable for prepass scheduling.
- Expansion of Simulated Operator(s)
-
The Simulated Operator(s) need to be expanded before postpass scheduling and some
of them can only be expanded after register allocation.
- Generation of Literal Pools
-
The literal pools are implement as BasicBlock annotations. This contrats with the
NativeBlock that contain either Instruction(s) or Literal(s) (whh?).
3. JIT Code Generation
3.1. Instruction Selection
3.2. Basic Program Flow Analyzes
3.3. Static Single Assignment Form
3.4. Loop and Region Optimizations
3.5. Sparse Program Flow Analyzes
3.6. IF-Conversion and Predication
3.7. Control-Flow Maintenance
3.8. Register Allocation and Frame Layout
3.9. Superblock Scheduling and Pipelining
3.10. Instruction Encoding and Bundling